I’m trying to move a project from GNU make to cmake. The old project has some make code shown below which does some “interesting” things. My port strategy is to basically re-implement the make steps within cmake.
Are there any suggestions on how to implement these targets in cmake?
I’ve tried various invocations of “add_custom_target” and “add_custom_command” along with the “COMMAND” and “VERBATIM” flags. These always produce errors. It appears that the shell and/or compiler aren’t happy by the way cmake quotes the parameters when the resultant make file is executed.
This is a tiny part of the build for retrobsd, in case you’re curious as to where this comes from.
Can you please format the make fragment as code? This is no valid makefile, I guess the < in $< were suppressed.
In general it looks like a normal static library with assembler compilation.
And instead of having assembler files, the code is printed to STDOUT.
If that SYS($) is a SYS($<) if would say, you do compile the identical assembler code with different object names. I don’t know, why something like this should be done.
It’s probably easier to understand, if you post some command lines, of what the make actually executed.
In CMake i would definitely generate the assembler source with file(GENERATE) or such.
And add them to a normal static library, so CMake cares about the details of compilation and archiving.
I would definitely go with file generation here (configure_file may suffice as well). These kinds of shenanigans don’t map well to all of CMake’s generators and, as such, there’s not really an abstraction for them. While I have seen some ways to smuggle things through, it’s not portable and I’d recommend adapting to CMake’s abstractions rather than trying to pierce them (they’re leaky enough already, but you may also interfere with the inner workings inadvertently).